Advaced Computer Architecture

Semestr: Winter

Range: 2+2s

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Credits: 4

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Summary:

Instruction level parallelism (pipelined, superpipelined and superscalar systems). Basic limitations to parallelism (structural, data and control hazards). Instruction fetch and execution methods (in order, out of order). Register data flow, software and hardware solutions, interlocking, scoreboard, control stack. Memory reuse, register renaming. Modern RISC processors. Parallel systems, performace evaluation, HPCC, supercomputers. Shared memory multiprocessors (bus, switch, switched memory). Interconnection structures. Cache coherence mechanisms for multiprocessor systems. MIMD systems UMA, NUMA, COMA. Distributed memory multiprocessors (crossbar switch). Data flow systems, multithreading. Accelerators, special architectures.

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Literature:

J.L.Hennessy, D.A.Patterson. Computer Architecture: A Quantitative Approach. The Morgan Kaufmann,3rd Edition, 1990, ISBN 1-55860-724-2.

J.Shen and M.Lipasti. Modern Processor Design: Fundamentals of Superscalar Processors, McGraw Hill 2005, ISBN 0-07-057064-7.

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