Project responsible person: Ing. Miroslav Skrbek
Project supervisor: Doc. Ing. Miroslav Snorek, CSc.
Project start: 1991
Project end: 2000
Keywords: neural network, neurochip, hardware, ASIC, XLILINX FPGA.
Abstract:
Neural networks have been applied in many applications since their renaissance in the eighties. The most used way of their implementation is a program running on a personal computer or a workstation. This dominance is especially given by higher flexibility of software. Users may easily modify the topology of the network, type of processing elements or learning rules according to the requirements of their application. However, to implement the neural network on a sequential computer seems to be very paradoxical because the biological neural networks, from which artificial neural networks originate, operate highly in parallel.
A step to the highly-parallel neural systems is a neurochip that first appeared as a commercial product at the start of nineties. The neurochip is an analog or digital integrated circuit that implements several (for instance 8, 16, or 64) processing elements (neurons). Processing elements are independent and operate in parallel. Their optimized internal calculations give them very high performance. Neurochips are designed as building blocks, from which larger networks can be assembled.
The major requirements on the neurochip design are high performance and small chip area occupied by the processing element. Therefore the processing element has to be as simple as possible. This is motivation of our research. Following the digital technology, we are tring to find ways leading to very small and very fast neural structures.
Main results:
Skrbek, M.: New Neuochip Architecture. Doctoral Thesis.115 p.CTU, Faculty of Electrical Engineering, Prague 2000.
Skrbek, M.: Fast Neural Network Implementation. In: Neural Network World. 9, No. 5, (1999) p. 375-391. ISSN 1210-0552 (Download 631Kb (*.PS))
Skrbek, M. - Snorek, M.: SHIFT-ADD Neural Architecture. In: Proceedings of ICECS'99. Cyprus: IEEE. 1999. p. 411-414. - ISBN 0-7803-5682-9
Skrbek, M. - Snorek, M.: Neural Hardware Prototyping on FPGAs. In: Electronic Computers and Informatics'98. Kosice: TU FEI. 1998. p. 87-92. ISBN 80-88786-94-0
Skrbek, M. - Snorek, M.: SHIFT-ADD Neural Architecture. In: Proceedings of ICECS'99. Cyprus: IEEE. 1999. p. 411-414. - ISBN 0-7803-5682-9
Snorek, M. - Skrbek, M.: Hardware Neurochips - an Updated Overview. In: Electronic Computers and Informatics'98. Kosice: TU FEI. 1998. p. 81-86. ISBN 80-88786-94-0
M. Skrbek: Experimental Card for Shift-add Neural Architecture Verification. Workshop'96. CTU Prague and TU Brno. pp. 295-296, Prague, 1996.
M. Skrbek and M. Snorek: Neurochip Innovation: Shift-add Processing Unit. Design and Diagnostics of Electronic Circuits and Systems '95. Roznov pod Radhostem. K. Vlcek editor, pp. 65-69, FEI VSB-TU Ostrava, 1995.
M. Snorek and M. Skrbek: Artificial Neural Network Accelerators. Elektrotechnik und Infomationstechnik, Neuronale Netze, No.7-8, 329-333,1995.
M. Skrbek and M. Snorek: An Architecture for an Efficient Implementation of Neural Networks. Proceedings of the ESM'95, pp. 785-789 . Editor: M. Snorek and M. Sujansky and A. Verbraeck.Prague, Czech Republic, 1995.
M. Skrbek: Back Propagation for NLX420. Faculty of Applied Physics, Technical University of Delft. Delft, Netherlands,1994.
M. Skrbek: The 80170NX ETANN Supported by Intel Neural Network Training System. Faculty of Applied Physics, Technical University of Delft. Delft, Netherlands,1994.
M. Skrbek and M. Snorek:Reconfigurable Neuronal Accelerator, Workshop'93, CTU Prague, pp.115-116, Prague, 1993.
M. Snorek and M. Skrbek: What it is that Creates a Functional Neural Net from a Single Neurochip. Neuronet'93, ICS AS CR,1993.